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Introduction and Explanation of Detector Data

Gain | Amplifiers | MPP | Traps | CTE | Linearity | Readnoise
Baseline (bias) | Offset | Return to Detector Table of Contents
These pages include the most current information on detectors for Mount Hamilton facility instruments. Questions about technical CCD issues should be directed to Richard Stover ( or Minghzi Wei (, at our CCD Lab in Santa Cruz. To learn more about a detector's performance with a particualr instrument, consult the appropriate instrument manual, or check with a mountain support scientist

Lick observatory detectors are identified by the number or name of the dewar in which they are installed (e.g. Dewar #6 or Kastred). Dewars are occasionally upgraded with new detectors--in fact, most Lick dewars have contained more than one chip during their lifetimes. When a detector is replaced, the dewar designation adheres to the new device. Only the data for the current occupant of a dewar are given in these pages (a dewar's history may be learned by contacting the Lick CCD Lab).

Most of the measurements given in these pages have been made at the lab in Santa Cruz, and while they represent the best available data on how a dewar will perform at the telescope, some differences are inevitable, due to different hardware and operating conditions on the mountain.


Gain is expressed as the number of electrons per Digital Number (DN). Gain is usually meausured with our Fe55 Xray source. Each absorbed xray releases 1620 electons. This gives us a known amount of charge which can then be compared to the DN recorded. Their ratio is the gain.

N.B. On-chip binning--an operating option with most of our detectors--affects the gain when the device is being run with a Lick controller, the gain being reduced by four when the chip is binned by 2 in rows and columns. However, CCD's operated with Leach controllers maintain the same gain irrespective of binning.


For the 2Kx2K CCD's there are two serial registers on opposite sides of the chip. One side is called the "A" side and one is called the "B" side. Each serial register has two amplifiers, one is the left or "L" amplifier and one is the right or "R" amplifier. So amplifier AR, for instance, is the right amplifier on the A side.

Multi-Phase Pinned (MPP) and non-MPP Modes

In non-MPP mode the three parallel clocks are used to define the pixels along each column. During an exposure one of the clocks is held at the positive voltage, and charge collects under that phase. The other two parallel clocks are held at the more negative voltage and act as charge barriers to define the pixels.

In MPP mode all of the clocks are held at the negative level during an exposure. A special negative implant is used under one of the parallel clocks to define a charge barrier. Because of the details of how dark current is generated, there is much less when all of the clocks are held at a sufficiently negative level. This is the only reason for MPP, but the barrier provided by the implant isn't as strong as the barrier provided in non-MPP mode and the maximum charge that can be held in a pixel is often smaller.

Some types of CCD's aren't fabricated with the MPP implant, so they can't be operated in MPP mode. All of our Loral and Orbit 2Kx2K CCD's have the implant, but some of them aren't run in MPP mode because of the reduced full well.


Traps--or bad columns--are identified by taking a very low level exposure and then shifting the charge back and forth on the CCD before it is read out. Charge trapping is dependent on tiny imperfections and is different depending on which way the charge gets shifted. The number of traps identified reading from the A side and the B side are often different, therefore traps are identified in the dewar data as belonging to one side or the other.

Charge Transfer Efficiency (CTE)

CTE is the measure of the fraction of charge moved from pixel to pixel per each clock phase during readout. The vertical CTE measures this quantity along columns, the serial CTE along rows.


A series of exposures with increasing exposure time are done to see if the measured signal increases in proportion to the exposure time. We usually test only at low count levels since that is where problems usually appear if there are any.

For linearity at high count rates, a safe rule of thumb is to keep counts 10-15% below the chip's full well. (If the ADC reaches its maximum before the chip's full well is reached, the question of high-level linrearity is moot in any case.)


Readnoise is expressed as e-/pixel. Readnoise is independent of exposure time. It is measured from the detector's overscan region.

The standard Lick data-taking programs allow the readnoise to be checked in real time (note that this is not the case for MOS which uses the "Expose" data-taking system). To check readnoise, select Z-4 from the data-taker main menu. This invokes a "test" submenu. Selection "B" in this submenu sets the readout to "fast" or "slow" (an option with Lick controllers which, when "fast" is selected, halves the readout time at the cost of some additional readnoise--most calibration and science frames are made with "slow" readout).

Selection "D" displays the horizontal clock noise in either fast or slow modes, depending on which has been chosen with selection "B." The mean of the horizontal clock noise, displayed at the bottom of the screen, is the readnoise in DN. Use the gain for the CCD being tested to convert to electrons. The readnoise may vary somewhat from the published figure. If it seems unduly high, contact a technician.

Baseline (bias)

A baseline (or bias voltage) is added to each pixel in an image, on a row-by-row basis. The value for each row's baseline is determined from the overscan region.

By default, most Lick data-taking systems perform an automatic baseline subtraction, so that the baseline is not retained in the raw data pixels. The overscan region is not saved, but the baseline level is stored in the the highest number column of every image. The overall baseline level is set in the controller, and should be in the range from 300 DN to about 2000 DN.

Baseline subtraction may be disabled in Lick data-taking systems under the Z-3 option in the main menu. However, if this is done, the CCD window must be made larger to include the overscan region in the raw frame. To do so, set the number of columns in the CCD window to a number greater than the actual number of columns on the CCD, using selection "D" in the data-taker. It is also necessary to create the file /u/ccd/engineering.

Note that MOS dewars do not allow automatic baseline subtraction, and that the default for the LIRC-2 NICMOS device is "baseline subtraction disabled."


Images made with detectors operated by Lick controllers (i.e. not Leach controllers, as in the cases of MOS and LIRC-2) include a 64 DN "fat zero" added to each pixel, and referred to as the "offset." It is a simple constant and is entirely distinct from the baseline. The offset is recorded in the BZERO parameter of the FITS header, so that any image display or reduction program that properly handles a FITS header will automatically subtract the offset when reading the image.

Fixed Pattern

"Fixed Pattern" is a low-level, periodic variation in detector DN due to 60-Hz line noise. Images read out in the "slow" readout mode are synchronized to the 60-Hz line frequency so that its effect is repeatable from frame to frame, appearing as a fixed vertical banding on the image. The fixed pattern may be recorded in 1-second "dark" exposures for later removal.

When operating in "fast" readout mode, the 60-Hz noise is randomly distributed across the image and becomes an additional source of readnoise. The amount of additional noise will depend on the amplitude of the 60-Hz pickup, and will vary from case to case.